If you stick with the OpenXLR8 flow, one of the configuration locations is always preserved so that you can get XLR8 back into a known good state if you end up corrupting the main image.
We created a video for that here: https://youtu.be/5cnHeB5X-ic
However, if you start programming the MAX 10 via JTAG directly from Quartus, you run the risk of completely wiping both configurations. At that point, the AVR IP and logic that allows the OpenXLR8 flow to work will be removed.
Are you currently planning to program the MAX 10 as a bare metal FPGA through JTAG?